| License | BSD-style |
|---|---|
| Maintainer | Olivier Chéron <olivier.cheron@gmail.com> |
| Stability | experimental |
| Portability | unknown |
| Safe Haskell | None |
| Language | Haskell2010 |
Crypto.System.CPU
Description
Gives information about crypton runtime environment.
Synopsis
- data ProcessorOption where
- pattern AESNI :: ProcessorOption
- pattern PCLMUL :: ProcessorOption
- pattern SSSE3 :: ProcessorOption
- pattern AVX :: ProcessorOption
- pattern AVX2 :: ProcessorOption
- pattern SHANI :: ProcessorOption
- pattern MOVBE :: ProcessorOption
- pattern ADX :: ProcessorOption
- pattern VAES :: ProcessorOption
- pattern VAES512 :: ProcessorOption
- pattern AVX512IFMA :: ProcessorOption
- pattern NEON :: ProcessorOption
- pattern ARMAES :: ProcessorOption
- pattern ARMPMULL :: ProcessorOption
- pattern ARMSHA1 :: ProcessorOption
- pattern ARMSHA2 :: ProcessorOption
- pattern ARMSHA512 :: ProcessorOption
- pattern PPCAES :: ProcessorOption
- pattern PPCVPMSUM :: ProcessorOption
- processorOptions :: [ProcessorOption]
- hasAESAcceleration :: Bool
- hasGHASHAcceleration :: Bool
Documentation
data ProcessorOption where Source #
A processor feature crypton looked for, and dispatches on where it finds it.
This is a number with names rather than a sum of constructors, and the
names are pattern synonyms with no COMPLETE pragma, so a case over
them needs a catch-all and a feature named in a later release breaks
nothing that compiled against this one. The same reason Show is
written out below: a program built against an older crypton still says
something useful about a value from a newer one.
The names are the processor's, not the operation's. AESNI is x86's
and ARMAES is AArch64's, and a machine reports only the ones it has;
ask hasAESAcceleration if the question is whether AES is fast here.
They are bundled with the type in the export list, so ProcessorOption
(..) brings in all of them and naming one brings in that one, as for a
type with constructors. The constructor underneath is not exported:
these values say what the processor was found to have, and a caller has
nothing to build.
Bundled Patterns
| pattern AESNI :: ProcessorOption | Support for AES instructions, with flag |
| pattern PCLMUL :: ProcessorOption | Support for CLMUL instructions, with flag |
| pattern SSSE3 :: ProcessorOption | Supplemental SSE3. |
| pattern AVX :: ProcessorOption | AVX, and an operating system that saves its registers. |
| pattern AVX2 :: ProcessorOption | AVX2, and an operating system that saves its registers. |
| pattern SHANI :: ProcessorOption | The SHA extensions, |
| pattern MOVBE :: ProcessorOption | The byte-swapping load. |
| pattern ADX :: ProcessorOption |
|
| pattern VAES :: ProcessorOption | The AES and carry-less multiply instructions in their 256-bit form. |
| pattern VAES512 :: ProcessorOption | The same pair in their 512-bit form. |
| pattern AVX512IFMA :: ProcessorOption | The AVX-512 52-bit integer multiply-adds, with AVX-512 F and VL, and the operating system saving their state: RSA's private-key operation uses them. |
| pattern NEON :: ProcessorOption | Advanced SIMD, which is not optional on AArch64. |
| pattern ARMAES :: ProcessorOption | The ARMv8 AES instructions. |
| pattern ARMPMULL :: ProcessorOption |
|
| pattern ARMSHA1 :: ProcessorOption | The ARMv8 SHA-1 instructions. |
| pattern ARMSHA2 :: ProcessorOption | The ARMv8 SHA-256 instructions. |
| pattern ARMSHA512 :: ProcessorOption | The ARMv8.2 SHA-512 instructions, which are optional where SHA-256's are not. |
| pattern PPCAES :: ProcessorOption | Support for the PowerISA 2.07 vector AES instructions, which POWER8 was the first to implement. |
| pattern PPCVPMSUM :: ProcessorOption | Support for |
Instances
| Show ProcessorOption Source # | Named where the name is known, numbered where it is not, so that a binary built against an older crypton can still print a value a newer one produced. |
Defined in Crypto.System.CPU Methods showsPrec :: Int -> ProcessorOption -> ShowS # show :: ProcessorOption -> String # showList :: [ProcessorOption] -> ShowS # | |
| Eq ProcessorOption Source # | |
Defined in Crypto.System.CPU Methods (==) :: ProcessorOption -> ProcessorOption -> Bool # (/=) :: ProcessorOption -> ProcessorOption -> Bool # | |
| Ord ProcessorOption Source # | |
Defined in Crypto.System.CPU Methods compare :: ProcessorOption -> ProcessorOption -> Ordering # (<) :: ProcessorOption -> ProcessorOption -> Bool # (<=) :: ProcessorOption -> ProcessorOption -> Bool # (>) :: ProcessorOption -> ProcessorOption -> Bool # (>=) :: ProcessorOption -> ProcessorOption -> Bool # max :: ProcessorOption -> ProcessorOption -> ProcessorOption # min :: ProcessorOption -> ProcessorOption -> ProcessorOption # | |
processorOptions :: [ProcessorOption] Source #
Options which have been enabled at compile time and which this machine says may be used: on x86-64 what the processor declares through CPUID, and for the vector extensions only where the operating system saves their state as well; elsewhere what the operating system reports of the processor.
That is what crypton itself decides by, and it is not always everything the core underneath executes. A guest under a hypervisor may be shown an older processor model than the host's, so that it can be moved to another host -- and an instruction used because it happens to run would fail there. So an option missing here means crypton will not use it, not that the hardware lacks it.
Sorted, and without repeats. A machine reports the names of its own
architecture only: an AArch64 processor with AES says ARMAES, not
AESNI, which it does not have.
Questions that do not name an architecture
hasAESAcceleration :: Bool Source #
Is there hardware AES on this machine?
The instructions have different names on different architectures, and a caller that wants to know whether AES-GCM will be fast wants this rather than either name.
hasGHASHAcceleration :: Bool Source #
Is there a hardware carry-less multiply, which is what GHASH, and so AES-GCM, spends its time in once AES itself is fast?