clash-shockwaves
Copyright(C) 2025-2026 QBayLogic B.V.
LicenseBSD2 (see the file LICENSE)
MaintainerQBayLogic B.V. <devops@qbaylogic.com>
Safe HaskellNone
LanguageHaskell2010

Clash.Shockwaves.Trace.CRE

Description

Functions for tracing clock, reset and enable signals. The signals can be traced separately or together, using either hidden or explicit signals. The styles can be configured through style variables.

Synopsis

Tracing explicit signals

traceClock :: forall (dom :: Domain). KnownDomain dom => String -> Clock dom -> Clock dom Source #

Trace a clock signal. Keep in mind that the clock has to be evaluated in order for the signal to show up. Alternatively, use seq to force evaluation.

The styles can be configured through style variables clk_pre, clk_a and clk_b.

NB: This is not a traditional clock wave! The clock signal alternates every cycle, rather than going high and low within a cycle.

traceReset :: forall (dom :: Domain). KnownDomain dom => String -> Reset dom -> Reset dom Source #

Trace a reset signal. Keep in mind that the reset has to be evaluated in order for the signal to show up. Alternatively, use seq to force evaluation.

The styles can be configured through style variables reset_off and reset_on.

traceEnable :: forall (dom :: Domain). KnownDomain dom => String -> Enable dom -> Enable dom Source #

Trace an enable signal. Keep in mind that the enable has to be evaluated in order for the signal to show up. Alternatively, use seq to force evaluation.

The styles can be configured through style variables enable_off and enable_on.

traceClockResetEnable :: forall (dom :: Domain) a. KnownDomain dom => String -> (Clock dom -> Reset dom -> Enable dom -> a) -> Clock dom -> Reset dom -> Enable dom -> a Source #

Create a signal displaying the clock, reset and enable signals.

Example:

traceClockResetEnable "cre" myDesign clockGen resetGen enableGen

The style of a combined disable and reset can be configured through style variable reset_on_enable_off. For other options, see traceClock, traceReset and traceEnable.

NB: This does not contain a traditional clock wave! The clock signal alternates every cycle, rather than going high and low within a cycle.

Tracing hidden signals

traceHiddenClock :: forall (dom :: Domain) r. (KnownDomain dom, HiddenClock dom) => String -> r -> r Source #

Trace a hidden clock signal. See traceClock.

traceHiddenReset :: forall (dom :: Domain) r. (KnownDomain dom, HiddenReset dom) => String -> r -> r Source #

Trace a hidden reset signal. See traceReset.

traceHiddenEnable :: forall (dom :: Domain) r. (KnownDomain dom, HiddenEnable dom) => String -> r -> r Source #

Trace a hidden enable signal. See traceEnable.

traceHiddenClockResetEnable :: forall (dom :: Domain) r. (KnownDomain dom, HiddenClockResetEnable dom) => String -> r -> r Source #

Trace hidden clock, reset and enable signals. See traceClockResetEnable.